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TurboWave V

The TurboWave V is the Turbo V version of the TurboWave. Unlike the X16 version, this one does not use a UART since we can use wait states to make sure the RP2350 can keep up, making it faster and more turboey. This does require more pins and is a yet-unproven design as a result. A Pimoroni PGA2350 may be needed here, along with removing SD card and MIDI support (maybe).

The original decision to use a UART was to avoid the very tight timings of the X16 bus and to save some pins though the latter is solved via the PGA2350. The paged nature of the UART API would be carried over to reduce the number of address pins required. The Turbo V supports wait states for cards and this can be used in the event the RP2350 cannot keep up at the full speed of the bus. This is still likely much faster than the UART solution while allowing for simpler interactions with the TurboWave in program code.

Pinout Plans

The PGA2350 has 48 GPIOs.

Existing Pins

  • DAC requires 3 address lines, 8 data lines, 5 control lines (WR, etc.) for 16 total
  • MIDI UART, if kept, needs 3 pins (TX, RX, OE)
  • SD Card, if kept, needs 4 pins (DAT0, CLK, CMD, CS)

That would be 23 pins total.

The SD card may not be needed given the 8MB of PSRAM. The time it takes to load samples onto the TurboWave would be much, much, faster.

Bus Pins

  • Data pins: 8
  • Device Enable, IRQ, Reset (Optional), Clock, RW: 5

Given the above, that's 36 total, which leaves up to 12 for address lines. "Up to" because some of the GPIOs may have special considerations. 8 lines would give us a similar setup to the UART pages now where 0xFF is bank select, and the rest of specific to the page. Though with 256 registers, paging might not even be required. It really depends on how the command/channel mappings work (which could be preserved for efficiency).

The performance bank (as of this writing), uses up a pretty bug chunk of an 8-bit address space.

That solution would require 44 pins in total.

API

While similar to the UART API, the parallel API does not require the command and data stanza. Instead it is address (register) plus data which is quite nearly the same thing, just done in one read/write operation instead of multiple UART RX/TX trips.

So for instance, to set the page bank, it's a simple write to address ...FF with the data being the page you want.